Can China Chip Stacking Technology Challenge Nvidia AI Dominance in 2026

Chip stacking strategy is emerging as China's most innovative response to US semiconductor restrictions — but can this approach truly close the performance gap with Nvidia's advanced GPUs? As Washington continues to tighten export controls on cutting-edge chipmaking technology, Chinese researchers are proposing a bold workaround: stack older, domestically producible chips together to replicate the performance of chips they can no longer access.

💾 The Core Concept: Building Upward Instead of Forward

The chip stacking strategy centres on a deceptively simple premise — if you can't manufacture more advanced chips, build smarter systems with the chips you can produce. Wei Shaojun, vice-president of the China Semiconductor Industry Association and a professor at Tsinghua University, recently outlined to the South China Morning Post an architecture that combines 14-nanometer logic chips with 18-nanometer DRAM using three-dimensional hybrid bonding.

📌 US export controls specifically target the production of logic chips at 14nm and below, and DRAM at 18nm and below. Wei's proposal works precisely at these technological boundaries — using processes that remain accessible to Chinese manufacturers.

The technical approach involves what's called "software-defined near-memory computing." Instead of shuffling data back and forth between processors and memory — a major bottleneck in AI workloads — the chip stacking strategy places them in intimate proximity through vertical stacking. The 3D hybrid bonding technique creates direct copper-to-copper connections at sub-10 micrometre pitches, essentially eliminating the physical distance that slows down conventional chip architectures.

📊 The Performance Claims — and a Reality Check

Wei claims this configuration could rival Nvidia's 4nm GPUs while significantly reducing costs and power consumption. He has cited performance figures of 2 TFLOPS per watt and a total of 120 TFLOPS. There is, however, one critical problem:

⚠️ Nvidia's A100 GPU — positioned as the comparison point — actually delivers up to 312 TFLOPS, more than 2.5 times the claimed performance of the proposed stacked chip architecture.

This discrepancy highlights a fundamental question about the chip stacking strategy's feasibility. While the architectural innovation is real, performance gaps remain substantial. Stacking older chips does not magically erase the advantages of advanced process nodes, which deliver superior power efficiency, higher transistor density, and better thermal characteristics.

🌟 Why China Is Betting on This Approach

The strategic logic behind the chip stacking strategy extends well beyond pure performance metrics. Huawei founder Ren Zhengfei has articulated a philosophy of achieving "state-of-the-art performance by stacking and clustering chips rather than competing node for node." This represents a meaningful shift in how China approaches the broader semiconductor challenge.

Consider the alternatives. TSMC and Samsung are pushing toward 3nm and 2nm processes that remain completely out of reach for Chinese manufacturers. Rather than fighting an unwinnable battle for process node leadership, the chip stacking strategy proposes competing on system architecture and software optimisation instead.

🔍 The Feasibility Question

Can the chip stacking strategy actually work? The technical foundations are sound — 3D chip stacking is already used in high-bandwidth memory and advanced packaging solutions worldwide. The innovation lies in applying these techniques to create entirely new computing architectures, rather than simply improving existing designs.

However, several significant challenges remain:

• 🔥 Thermal management becomes significantly more difficult when stacking multiple active processing dies. The heat generated by 14nm chips is considerably higher than modern 4nm or 5nm processes — and stacking intensifies the problem.
• ⚠️ Yield rates in 3D stacking are notoriously difficult to optimise. A single defect in any layer can compromise the entire stack.
• 💻 Software ecosystem maturity — the software infrastructure required to efficiently leverage such architectures does not yet exist and would take years to develop.

💡 The most realistic assessment: the chip stacking strategy is a valid approach for specific workloads where memory bandwidth matters more than raw computational speed — such as AI inference tasks, certain data analytics operations, and specialised applications. Matching Nvidia's full-spectrum AI training and inference performance, however, remains a distant goal.

🌎 What This Means for the AI Chip Wars

The emergence of the chip stacking strategy as a focal point for Chinese semiconductor development signals a clear strategic pivot. Rather than attempting to replicate Western chip designs with inferior process nodes, China is exploring architectural alternatives that play to available manufacturing strengths.

Whether the chip stacking strategy ultimately succeeds in closing the performance gap with Nvidia remains uncertain. What is clear is that China's semiconductor industry is actively adapting to restrictions by pursuing innovation in areas where export controls have less impact — system design, packaging technology, and software-hardware co-optimisation.

For the global AI industry, this means the competitive landscape is becoming more complex. Nvidia's current dominance faces challenges not only from traditional rivals like AMD and Intel, but also from entirely new architectural approaches that may fundamentally redefine what an "AI chip" looks like.